The present disclosure herein relates to a semiconductor memory device, and more particularly, to a data storage device, including a non-volatile memory device, and a program method thereof.
In general, semiconductor memory devices are classified as either volatile memory devices or non-volatile memory devices. While the read and write speed of volatile memory devices is relatively fast, they are generally characterized by the loss of stored information upon power-off. On the other hand, non-volatile semiconductor memory devices are generally characterized by the retention of stored data even if the power supply thereto is interrupted. Among non-volatile memory devices, flash memory is considered advantageous for use as a secondary memory device because of its relatively high density.
In recent years, multi-bit memory devices are becoming more common as demand for high-density memory devices increases. Multi-bit memory devices may store multiple bits on a single memory cell. In addition, the process refining technology to improve integration is being developed continuously. However, higher integration can result in interference between memory cells of non-volatile memory device. Such interference may include coupling, program and read disturbance, and channel-coupled disturbance, and can cause the threshold voltage distribution of memory cells is spread. In an effort to overcome this problem, a Charge Trap Flash (CTF) memory has been developed. However, even in the CTF memory, physical problems like lateral charge spreading can still exist.
The robust Error Correction Code (ECC) may be used in a further effort to reduce the adverse consequences of interference. However, a relatively high cost is required when adopting robust ECC.